Some of Brandon Jernigan's Projects

Developed a lightweight, terminal-based serial interface designed for high accessibility within modern terminal emulators (e.g., Windows Terminal). Created as a streamlined alternative to integrated IDE terminals like MPLab X, this tool was built in Rust to provide a fast, memory-safe environment for daily serial communication. It serves as a personal utility that prioritizes simplicity and a CLI-first workflow for hardware interaction.

https://github.com/veryslowcode/no-one-likes-parallel

While at Microchip, I spearheaded the development of a hardware-based emulator to streamline the validation of over 200 unique EEPROM and Flash devices. Originally a breadboard prototype, I transitioned this into a custom PCB design using Altium Designer, centered on the PIC32MX microcontroller.

The system emulates I2C, SPI, and SingleWire protocols, allowing for the rapid testing of memory-specific features—such as security registers and variable array sizes—without the need for physical silicon. I developed the firmware in C, implementing a custom UART configuration interface with an encoded packet protocol to manage real-time emulation parameters. This project was eventually integrated into the team's official R&D workflow to accelerate software release cycles.

Built a versatile Python wrapper designed to enhance the readability of dense terminal output and stack traces. This project intercepts application logs and applies custom regex-based filtering to highlight or subdue specific patterns. I implemented support for multiple color formats ( 8-bit, 16-bit, and 24-bit) to ensure compatibility across different terminal environments. A key use case for this tool was 'noise reduction' in complex Java/Spring Boot stack traces, allowing me to visually de-emphasize framework logs while bringing custom source code errors to the forefront.

https://github.com/veryslowcode/harness